A model can produce an answer in seconds, but the machinery behind that answer takes years to assemble. Before an AI accelerator reaches a data centre, somebody must design its circuits, manufacture the silicon, supply its memory and connect the pieces inside a package that can survive extraordinary electrical and thermal demands. The investment opportunity lies in understanding which of those steps remains difficult when everyone else expands capacity.
The investment question
Semiconductors are a chain of interdependent businesses with different economics. A designer sells computing capability; a foundry sells manufacturing execution; an equipment supplier sells the ability to manufacture; a memory producer supplies working capacity and bandwidth. Packaging and design software connect these activities. Their revenues respond to the same end markets at different times, and their margins need not move together.
Our central view is that AI broadens semiconductor spending while concentrating the most valuable constraints. More computation creates opportunities across the chain, but durable returns depend on qualification barriers, usable yield, software adoption and customer alternatives. A supplier can benefit from booming demand and still disappoint if its price already assumes permanent scarcity or if the investment required to serve that demand absorbs the cash generated.
How the industry fits together
The process starts with an intended workload. Engineers choose an architecture, integrate reusable intellectual property and use electronic design automation, or EDA, to verify and translate the design into manufacturing instructions. A foundry repeatedly deposits, patterns, removes and modifies materials on wafers. Testing identifies functional dies; packaging connects them to memory, other dies and the outside system.
This is not a simple conveyor belt. The package constrains the chip architecture; the manufacturing process constrains the design; memory bandwidth constrains useful computing performance. Decisions therefore overlap well before production. TSMC’s description of CoWoS packaging illustrates why integration belongs inside the technology strategy rather than being treated as an afterthought.
Nor does every device need the smallest available transistor. Power management, radio-frequency components, sensors and many industrial chips use specialised or established processes. A leading-edge AI boom can coexist with weak utilisation elsewhere. Treating semiconductor demand as a single cycle conceals the distinction between technology transitions, inventory corrections and actual end-market growth.
Market structure and competitive advantage
| Subsector | What customers buy | Main competitive test |
|---|---|---|
| Chip design | Workload performance and a usable platform | Adoption and system economics |
| Foundries | Qualified manufacturing capacity | Yield, reliability and execution |
| Manufacturing equipment | Process capability and throughput | Technical differentiation and installed base |
| Memory | Capacity, bandwidth and reliability | Cost per useful bit and qualification |
| Packaging | Dense, reliable connections | Integration yield and capacity |
| Design software | Verified designs ready for manufacture | Trusted workflows and ecosystem support |
Competition is consequently uneven. NVIDIA and AMD compete in accelerated computing, while Broadcom participates in custom silicon and connectivity. TSMC operates a dedicated foundry model; Samsung combines several semiconductor activities; Intel’s product and foundry ambitions require separate assessment. ASML, Applied Materials, Lam Research and KLA address different manufacturing steps. Synopsys and Cadence supply design tools, while Arm’s licensing economics differ from selling EDA seats or complete chips.
These roles explain why apparent substitutes can share suppliers. A hyperscaler’s custom accelerator may challenge a merchant GPU while requiring the same foundry, memory ecosystem, design tools and packaging capacity. The relevant exposure is therefore the customer’s bill of materials and production route, not whether a company is loosely described as an AI winner.
Economics: follow cash through the chain
A useful starting point is revenue equals units multiplied by realised price, but both terms require interpretation. For foundries, wafer starts must become saleable output through acceptable yield. For memory, bits shipped can rise while price per bit falls. For equipment, an order is not a shipment, and a shipment is not always recognised revenue in the same period. For designers, reported demand can run ahead of end-user consumption when distributors or customers build inventory.
Capital intensity changes the meaning of profitability. A fabless designer outsources manufacturing but still funds research and may make substantial purchase commitments. A foundry must build and equip factories before the resulting capacity generates revenue. Memory suppliers finance process transitions through volatile selling-price cycles. Equipment businesses carry research, inventory and service obligations, but generally do not finance their customers’ entire factory fleets.
Consider an illustrative manufacturing calculation. If the cost of processing a wafer is unchanged but the proportion of functional dies rises from 60% to 80%, cost per functional die falls by 25%, before packaging and other adjustments. This is arithmetic, not a forecast or an estimate for any supplier. It explains why yield learning can matter more than a headline wafer-price comparison.
AI and hyperscalers: the demand transmission
AI spending travels upstream through orders for complete systems. Training requires accelerators to exchange information at scale; inference adds requirements around response time, memory capacity and cost per useful answer. Both depend on more than arithmetic throughput. An accelerator waiting for data or constrained by power is an expensive asset delivering less than its advertised capability.
Hyperscalers influence both demand and market structure. They buy merchant processors, design custom chips and operate the software environments that make those chips useful. AWS describes Trainium as an integrated chip, server, network and software system. That is a statement of product strategy, not independent proof that it offers the best economics for every model.
The analytical implication is that custom silicon can redistribute semiconductor profits without reducing total semiconductor demand. A cloud operator may retain part of the margin previously paid to a merchant designer, while increasing expenditure on wafers, memory and interconnects. Conversely, better software efficiency can reduce the hardware needed for a fixed workload. Whether aggregate demand grows depends on how strongly usage expands when computing becomes cheaper.
Current market debates — September 2026
The immediate debate is whether capacity commitments represent durable demand or a rush to secure scarce inputs. In its second-quarter 2026 results, TSMC reported strong demand for advanced manufacturing. ASML’s July 2026 results likewise connected customer expansion plans to AI-related logic and memory investment. These are reported results and management assessments; they do not establish the eventual return on customers’ AI deployments.
The constructive case is that deployment broadens from model training into sustained inference, maintaining demand across successive product generations. The countercase is that overlapping commitments, faster equipment turnover and slower monetisation produce excess capacity in some parts of the chain. Both can be true at once: advanced packaging can remain constrained while a particular accelerator generation becomes harder to rent profitably.
Evidence should be traced across the chain. Strong equipment orders accompanied by better manufacturing utilisation, sustained end-customer usage and improving customer cash generation provide a more convincing signal than equipment orders alone. A backlog can document commitment without proving that every underlying project will be commissioned on time.
Structural debates: where the profit pool moves
Three questions outlast an individual earnings season. First, does advantage accrue to the best component or to the supplier coordinating the whole system? Integration can improve performance and simplify deployment, but customers have incentives to preserve alternatives. Second, do chiplets distribute manufacturing opportunities or concentrate orchestration in the hands of the package and platform owner? Open interfaces help, but qualification and accountability remain commercial barriers.
Third, can geographic diversification produce acceptable returns? More production locations may improve resilience, while duplicating infrastructure and complicating supplier coordination. The investment test is the cost, yield and utilisation of qualified output at each site. Announced spending and government support are inputs to that test, not substitutes for it.
What to watch
Track advanced-node utilisation alongside mature-node utilisation; packaging qualification alongside announced capacity; memory pricing alongside bit shipments; and equipment service activity alongside new orders. For designers, compare revenue growth with customer concentration, purchase commitments and deployment evidence. For the chain as a whole, connect hyperscaler capital expenditure to installed, powered and economically productive capacity.
The strongest businesses should retain customer relevance after shortages ease. This section therefore examines each subsector through the same question: what measurable customer problem does the supplier solve, and why would that customer keep paying an attractive price once competing capacity becomes available?
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Semiconductors & chipmaking — sector overview
Related sectors: AI infrastructure & data centres · Data platforms & analytics